A printed wiring board employed as a package substrate is manufactured by a method disclosed in, for example, JP H0 9-130050 A. Electroless plating or etching is conducted on the surface of a conductor circuit for a printed wiring board, thereby forming a roughened layer. Thereafter, the roughened layer is coated with interlayer insulating resin, exposed, and developed by a roll coater and printed to form via hole opening portions for interlayer continuity, and UV hardening and actual hardening are conducted to the resultant layer, thereby forming an interlayer resin insulating layer. Further, the interlayer insulating layer is subjected to a roughening treatment with acid or oxidizer, and a catalyst such as palladium is put on the roughened surface of the layer. A thin electroless plated film is formed and, a pattern is formed on the plated film by a dry film, a thick plated layer is plated by electroplating, the dry film is peeled off with alkali, and the thin film and the thick layer are etched to form a conductor circuit. By repeating this process, a buildup multilayer printed wiring board is obtained. In addition, a solder resist layer is formed as the outermost layer of the printed wiring board so as to protect the conductor circuit.
As shown in FIG. 17, in case of forming solder bumps 376, a part of a solder resist layer 370 is opened, a nickel layer 372 and a gold layer 374 are provided on each exposed conductor circuit 358 to form a solder pad 373. A solder paste is printed on the solder pad 373, and reflow is conducted, thereby forming the solder bump 376. The reason for forming the gold layer 374 above the conductor circuit 358 with the nickel layer 272 intervening is as follows. If the gold layer is formed on the nickel layer by electroless plating, the nickel layer serves to stabilize the formation of the gold layer. That is, the nickel layer prevents the diffusion or the like of the gold layer.
The printed wiring board employed as an IC chip package substrate is required to improve frequency characteristics. On the printed wiring board constituted as stated above with reference to FIG. 17, if the frequency of an IC chip exceeds 1 GHz, signal propagation delays and malfunction tends to occur. If the frequency of the IC chip exceeds 3 GHz, the tendency of the malfunction becomes more conspicuous. The inventor of the present application fathomed the cause of this disadvantage, and discovered that this is caused by providing the nickel layer 372 and the gold layer 374 on the conductor circuit 358 to constitute the solder pad 373. In other words, because of the use of the two-layer structure of the nickel layer 372 and the gold layer 374, signal propagation delay, increase in resistance and the like occur to the interfaces of the respective layers. The inventor discovered that the signal delay tends to occur particularly to the nickel layer and that the nickel layer differs in delay from the other metals.
Further, if the opening size of the nickel layer becomes smaller, plating-based precipitation tends to be adversely influenced by the smaller size. In addition, the nickel layer 372 pushes up the printed wiring board manufacturing cost. Besides, since the nickel layer 372 is high in electric resistance, the electric properties of the printed wiring board are lowered. If a connected wiring is a power supply layer and the frequency thereof exceeds 1 GHz in a high frequency range, then the quantity of the supply of power to the IC chip increases. Since a large capacity of power should be supplied momentarily, the transmission of the power is hampered by the nickel layer.
On the other hand, as shown in FIG. 34, in case of providing conductive connection pins 398, apart of the solder resist layer 370 is opened, the nickel layer 372 and the gold layer 374 are provided on each exposed conductor circuit (via) 358 to thereby form the solder pad 373. A solder paste which becomes conductive adhesive, is printed on the solder pad 373, and reflow is conducted, thereby bonding the conductive adhesive 395 through the conductive adhesive 395. The reason for forming the gold layer 374 on the conductor circuit 358 with the nickel layer 272 intervening is as follows. If the gold layer is formed on the nickel layer by electroless plating, the nickel layer serves to stabilize the formation of the gold layer. That is, the nickel layer prevents the diffusion or the like of the gold layer.
As described above, the printed wiring board employed as an IC chip package substrate is required to improve frequency characteristics. On the printed wiring board constituted as stated above with reference to FIG. 34, if the frequency of an IC chip exceeds 1 GHz, signal propagation delays and malfunction tends to occur. If the frequency of the IC chip exceeds 3 GHz, the tendency of the malfunction becomes more conspicuous. The inventor of the present application determined the cause of this disadvantage, and discovered that this is caused by providing the nickel layer 372 and the gold layer 374 on the conductor circuit 358 to constitute the solder pad 373. In other words, because of the use of the two-layer structure of the nickel layer 372 and the gold layer 374, signal propagation delay, increase in resistance and the like occur to the interfaces of the respective layers. The inventor also discovered that the signal delay tends to occur particularly to the nickel layer and that the nickel layer differs in delay from the other metals.
The present invention has been made to solve the above-stated problems, and the first object of the present invention is to provide a printed wiring board which includes solder pads excellent in high frequency characteristic and a printed wiring board manufacturing method.
It is the second object of the present invention to provide a printed wiring board which includes BGAs excellent in high frequency characteristic and a printed wiring board manufacturing method.
It is the third object of the present invention to provide a printed wiring board which includes conductive connection pins and has an excellent high frequency characteristic and a printed wiring board manufacturing method.